Demystifying Chiplet technology, the savior of Moore's Law, two camps and six core players

The emergence of chiplet technology is an inevitable choice for the industrial chain under the need of optimizing production efficiency. The core of its technology is to achieve high-speed interconnection between chips. Therefore, UCIe does not impose strict restrictions on members in terms of specific packaging methods, and the industry has also differentiated. two camps.

The fab camp focuses on large-area silicon interposers for interconnection, which can provide higher-speed connections and better scalability; while the packaging plant camp strives to reduce silicon wafer processing requirements and propose cheaper and more cost-effective solutions ; Both fabs and packaging factories seek to obtain a higher proportion of the value of the industry chain in the Chiplet era. Domestically, Changdian Technology has launched the TSV-less advanced packaging solution XDFOI, leading the development of the industry; Tongfu Microelectronics has achieved rapid growth by binding AMD through its excellent wafer-level packaging capabilities.

In this issue of smart internal reference, we recommend Changjiang Securities' report "Chiplet Technology: Advanced Packaging, Who Will Govern the Ups and Downs" to reveal the Chiplet technology and its industrial structure. If you want to collect the report of this article, you can reply to the keyword "nc648" in the core stuff public account.

Source: Changjiang Securities

original title:

"Chiplet technology: advanced packaging, who is in charge of ups and downs"

Author: Yang Yang, Zhong Zhihua, Han Zijie

01.

Chiplet

Chip heterogeneity optimizes efficiency at the manufacturing level

In fact, the original conceptual prototype of Chiplet came from Gordon Moore's 1965 paper "Cramming more components onto integrated circuits"; Gordon Moore not only proposed the famous Moore's Law in this paper, but also pointed out that "building large systems with smaller functions is more For economy, these functions are individually packaged and interconnected.”

In 2015, Dr. Zhou Xiuwen from Marvell proposed the concept of MoChi (Modular Chip) at the ISSCC conference, paving the way for the emergence of Chiplet. We believe that the development of the modern information technology industry is not an exploration of the unknown process, but a demand-driven technology upgrade. The emergence of Chiplet technology is an inevitable choice for the industrial chain to optimize production efficiency.

A computer is a device capable of instructing and automatically performing any arithmetic or logical operation in a series according to a series of instructions. In daily life, any electronic system we use can be regarded as a computer, such as: computer, mobile phone, tablet, microwave oven, remote control, etc. all contain computer system as the core control device.

The emergence of Chiplet is inseparable from two major trends:

1) The degree of heterogeneity and integration of computer systems is getting higher and higher

In order to facilitate the understanding of why the industry must choose Chiplet, this report starts from the perspective of computer architecture. This report will first clarify an important development idea of computer architecture—heterogeneous computing. Just like the modern economic system, in order to pursue higher output efficiency, the modern economic system has produced an extremely large and complex industrial division of labor system, and the re-division of labor in computer systems is heterogeneous computing.

The emergence of GPU and DPU is to make up for the shortcomings of CPU in graphics computing, data processing, etc., so that CPU can focus on logic judgment and execution, which is the computer system (System). The refined division of labor also makes the entire system huge. In small computing devices, only different chips can be integrated into one chip to form a SoC (System on Chip).

Picture ▲The concept of SoC (System on Chip)

As computers undertake more and more processing work in modern human life, the heterogeneous trend of computer architecture will become more and more obvious, and the required chip area will become larger and larger. Logic chips are heterogeneously integrated, and SoC, as a single chip, has limited area and processing methods, so SoC is not the ultimate solution for heterogeneity.

2) The data path bandwidth and delay problems between chips have been solved by the industry

The job of a chip is to execute instructions and process data, and the interconnection between chips requires huge bandwidth and ultra-low latency. Since the area of a single chip cannot be increased indefinitely, it is a natural idea to disassemble a chip into multiple chips, manufacture them separately and then package them together. The interconnection between chips requires the construction of a powerful data path, that is, ultra-high frequency, ultra-large bandwidth, and ultra-low latency. Advanced packaging technology represented by TSMC's CoWoS technology has also solved it.

Picture ▲ HBM2 based on advanced packaging provides 307GB/s high-speed bandwidth for the chip

In March 2022, Apple released the M1 Ultra chip, which uses the UltraFusion package architecture and is interconnected by two M1 Max dies. Architecturally, the M1 Ultra uses a 20-core central processing unit consisting of 16 high-performance cores and 4 energy-efficient cores. Compared to 16-core CPU chips on the market in a similar power consumption range, the M1Ultra offers 90% better performance. The high-speed interconnection of the two M1 Max is the key to Apple's chip leadership. Apple's UltraFusion architecture uses a silicon interposer to connect multiple chips and can transmit more than 10,000 signals at the same time, thus achieving up to 2.5TB/s low-latency processor interconnection bandwidth .

Picture ▲The internal structure of M1 chips of past dynasties, M1 Ultra is made of two M1 Max spliced together

In order to alleviate the "storage wall" problem, AMD took the lead in adopting a 3D stacked L3 cache in its Zen 3 architecture Ryzen 7 5800X3D desktop processor, allowing the CPU to access up to 96MB of L3-level cache, greatly improving the chip's computing efficiency.

Picture ▲ AMD Zen 3 Chiplet

3) Heterogeneous integration + high-speed interconnection has shaped Chiplet, a milestone in the chip industry

In summary, Chiplet itself is not a technological breakthrough, but a milestone jointly shaped by a number of technological iterative advancements. Chip leading companies still have the right to speak; therefore, Chiplet technology will not bring too much direct impact and changes to the industry in the short term. , but in the long run, it will definitely change the ecology of the global integrated circuit industry. At the same time, because Chiplet has mature technical support in design, manufacturing, packaging and other links, its advancement will also be very rapid.

Picture ▲Chiplet is the integration of PCB and the deconstruction of SoC

Technology serves demand, and the emergence of Chiplets alleviates the contradiction between the dependence of computing power on the number of transistors and the bottleneck of wafer manufacturing. As mentioned earlier, the demand that led to the emergence of Chiplet technology determines the size of its impact on the industry. With the increasing demand for computing power in modern data processing tasks, in essence, the core of computing power improvement is the increase in the number of transistors.

As one of Intel's founders, Gordon Moore stated in his original model that the number of transistors on a single chip cannot be increased indefinitely, either from a technical or cost perspective; therefore, the industry is working on increasing transistor density At the same time, other software and hardware methods are also being tried to improve the operating efficiency of the chip, such as: heterogeneous computing, distributed computing and so on.

Picture ▲The relationship between the production unit price of transistor devices and the number of transistors on the chip

Chiplet is an extension of heterogeneous computing, which mainly solves the efficiency problem at the chip manufacturing level. As the process shrinks, the core

There are two major bottlenecks in chip manufacturing: 1) After 28nm, the cost-effectiveness of transistors in high-process chips will no longer improve; 2) The cost of chip design has increased significantly, and the sunk cost of advanced-process chip design is unacceptably high.

Picture ▲ The manufacturing cost per million chips of each process will not be reduced after the 28nm node

Picture ▲The cost of advanced process chip design is rising rapidly (million US dollars)

On how chiplets improve the efficiency of design, production, and the impact on EDA, IC design and other industries:

(1) Based on the area advantage of small chips, Chiplet can greatly improve the yield of large chips, improve the efficiency of wafer area utilization, and reduce costs;

(2) Based on the flexibility of the chip composition, after the SoC is chipletized, different cores/chips can be manufactured separately by selecting the appropriate process, and then packaged through advanced packaging technology. Integrated manufacturing on a single wafer can greatly reduce the manufacturing cost of the chip;

(3) Based on the reusability and verified characteristics of small chip IP, the large-scale SoC is decomposed into modular chips according to different functional modules, reducing repeated design and verification links, which can reduce the complexity and design of the design. cost and improve product iteration speed.